Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/38713
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dc.contributor.authorLarcher, Philippe-
dc.date.accessioned2025-04-14T09:16:02Z-
dc.date.available2025-04-14T09:16:02Z-
dc.date.issued1997-
dc.identifier.isbn2212095848-
dc.identifier.urihttps://di.univ-blida.dz/jspui/handle/123456789/38713-
dc.language.isofrfr_FR
dc.publisherEyrollesfr_FR
dc.subjectVHDL (langage de description de matériel informatique)fr_FR
dc.titleVHDL:introduction à la synthèse logiquefr_FR
dc.typeBookfr_FR
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